1、完成半加器,全加器,八位加法器设计,使用例化语句,并将其设计成一个原件符号入库,做好程序设计,编译,程序仿真。1)编译成功的半加器程序:module h_adder(a,b,so,co);input a,b;output so,co;assign so=ab;assign co=a&b; endmodule2)编译成功的全加器程序:module f_adder(ain,bin,cin,cout,sum); output cout,sum;input ain,bin,cin; wire net1,net2,net3; h_adder u1(ain,bin,net1,net2); h_adder
2、u2(.a(net1),.so(sum),.b(cin),.co(net3); or u3(cout,net2,net3);endmodule3)编译成功的八位加法器程序:module f_adder8(ain,bin,cin,cout,sum); output 7:0sum; output cout;input 7:0ain,bin;input cin; wire cout0, cout1, cout2 ,cout3, cout4,cout5,cout6;f_adder u0(.ain(ain0),.bin(bin0),.cin(cin),.sum(sum0),.cout(cout0);f_
3、adder u1(.ain(ain1),.bin(bin1),.cin(cout0),.sum(sum1),.cout(cout1);f_adder u2(.ain(ain2),.bin(bin2),.cin(cout1),.sum(sum2),.cout(cout2);f_adder u3(.ain(ain3),.bin(bin3),.cin(cout2),.sum(sum3),.cout(cout3);f_adder u4(.ain(ain4),.bin(bin4),.cin(cout3),.sum(sum4),.cout(cout4);f_adder u5(.ain(ain5),.bin
4、(bin5),.cin(cout4),.sum(sum5),.cout(cout5);f_adder u6(.ain(ain6),.bin(bin6),.cin(cout5),.sum(sum6),.cout(cout6);f_adder u7(.ain(ain7),.bin(bin7),.cin(cout6),.sum(sum7),.cout(cout);4)八位加法器仿真程序:module f_adder8_vlg_tst();/ constants / general purpose registers/reg eachvec;/ test vector input registersr
5、eg 7:0 ain;0 bin;reg cin;/ wires wire cout;wire 7:0 sum;/ assign statements (if any) f_adder8 i1 (/ port map - connection between master ports and signals/registers .ain(ain), .bin(bin), .cin(cin), .cout(cout), .sum(sum);initial begin ain=10;bin=11;cin=0; #100 ain=10;bin=10;cin=1; #100 ain=12;bin=18; #100 $stop;end 5)八位加法器仿真图:6)元件原理图及元件入库:半加器原理图:文件入库bsf:全加器原理图:全加器元件入库:八位全加器rtl图:八位全加器仿真图:
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