数字逻辑电路实验报告.docx
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数字逻辑电路实验报告
数字逻辑电路实验报告
实验二:
16进制译码器
原理图:
GAL方程:
PLD16V8
BASICGATES
2009.04.16
LQYUSTCV0.1
WXYZNCNCNCNCNCGND
NCABCDEFGNCVCC
/A=/W*/X*/Y*Z+/W*X*/Y*/Z+W*/X*Y*Z+W*X*/Y*Z/
/B=/W*/X*/Y*Z+/W*X*/Y*Z+/W*X*Y*/Z+W*/X*Y*Z+W*X*/Y*/Z+W*X*Y*/Z
/C=/W*/X*/Y*Z+/W*/X*Y*/Z+W*X*/Y*/Z+W*X*Y*/Z+W*X*Y*Z
/D=/W*/X*/Y*Z+/W*X*/Y*/Z+/W*X*Y*Z+W*/X*Y*/Z+W*X*Y*Z
/E=/W*/X*Y*Z+/W*X*/Y*/Z+/W*X*/Y*Z+/W*X*Y*Z+W*/X*/Y*Z
/F=/W*/X*Y*/Z+/W*/X*Y*Z+/W*X*Y*Z+W*X*/Y*Z
/G=/W*/X*/Y*Z+/W*X*Y*Z+W*X*/Y*/Z+/W*/X*/Y*/Z
DESCRIPTION
注释:
实验中使用的是共阳极数码管,设计的时候还没有化简
VHDL代码:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYcode16IS
PORT(w,x,y,z:
INSTD_LOGIC;
A,b,c,d,e,f,g:
OUTSTD_LOGIC
);
ENDcode16;
ARCHITECTUREWORKOFcode16IS
BEGIN
A<=(NOTWANDNOTXANDNOTYANDZ)OR(NOTWANDXANDNOTYANDNOTZ)OR(WANDNOTXANDYANDZ)OR(WANDXANDNOTYANDNOTZ);
B<=(NOTWANDNOTXANDNOTYANDZ)OR(NOTWANDXANDNOTYANDZ)OR(NOTWANDXANDYANDNOTZ)OR(WANDNOTXANDYANDZ)OR(WANDXANDNOTYANDNOTZ)OR(WANDXANDYANDNOTZ);
C<=(NOTWANDNOTXANDNOTYANDZ)OR(NOTWANDNOTXANDYANDNOTZ)OR(WANDXANDNOTYANDNOTZ)OR(WANDXANDYANDNOTZ)OR(WANDXANDYANDZ);
D<=(NOTWANDNOTXANDNOTYANDZ)OR(NOTWANDXANDNOTYANDNOTZ)OR(NOTWANDXANDYANDZ)OR(WANDNOTXANDYANDNOTZ)OR(WANDXANDYANDZ);
E<=(NOTWANDNOTXANDYANDZ)OR(NOTWANDXANDNOTYANDNOTZ)OR(NOTWANDXANDNOTYANDZ)OR(NOTWANDXANDYANDZ)OR(WANDNOTXANDNOTYANDZ);
F<=(NOTWANDNOTXANDYANDNOTZ)OR(NOTWANDNOTXANDYANDZ)OR(NOTWANDXANDYANDZ)OR(WANDXANDNOTYANDZ);
NOTG<=(NOTWANDNOTXANDNOTYANDZ)OR(NOTWANDXANDYANDZ)OR(WANDXANDNOTYANDNOTZ)OR(NOTWANDNOTXANDNOTYANDNOTZ);
ENDWORK;
实验三:
海明校验电路
原理图:
做实验时,造错在总线上造错,导致读和写没有很好体现出来。
GAL方程:
PLD01V0
HAMMING
2009.04.16
LQYUSTCV0.1
ABCDEAEBECEDNCGND
NCS1S2S3R1R2R3R4NCVCC
IA=A$EA
IB=B$EB
IC=C$EC
ID=D$ED
K1=A$B$D
K2=A$C$D
K3=B$C$D
S1=A$B$D$K1
S2=A$C$D$K2
S3=B$C$D$K3
E1=S1*S2*S3
E2=S1*S2*/S3
E3=S1*/S2*/S3
E4=/S1*S2*S3
R1=A$E1
R2=B$E2
R3=C$E3
R4=D$E4
DESCRIPTION
VHDL代码:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYhammIS
PORT(i1,i2,i3,i4,e1,e2,e3,e4:
INSTD_LOGIC;
r1,r2,r3,k1,k2,k3,k4:
OUTSTD_LOGIC);
ENDhamm;
ARCHITECTUREhammingOFhammIS
SIGNALs1,s2,s3,b1,b2,b3,b4,c1,c2,c3,c4,d1,d2,d3,d4:
STD_LOGIC;
BEGIN
b1<=i1XORe1;
b2<=i2XORe2;
b3<=i3XORe3;
b4<=i4XORe4;
s1<=i4XORi2XORi1;
s2<=i4XORi3XORi1;
s3<=i4XORi3XORi2;
c1<=b4XORb2XORb1XORs1;
c2<=b4XORb3XORb1XORs2;
c3<=b4XORb3XORb2XORs3;
d1<=c1ANDc2AND(NOTc3)AND(NOTc4);
d2<=c1AND(NOTc2)AND(NOTc3)ANDc4;
d3<=(NOTc1)ANDc2ANDc3ANDc4;
d4<=c1ANDc2ANDc3ANDc4;
r1<=c1;
r2<=c2;
r3<=c3;
k1<=d1XORc1;
k2<=d2XORc2;
k3<=d3XORc3;
k4<=d4XORc4;
ENDhamming;
实验四:
时序脉冲分频电路
原理图:
二分频电路
四分频电路
五分频电路
三周期电路
GAL方程:
VHDL代码:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYexp5txIS
PORT(clk:
INSTD_LOGIC;
CP1,CP2,CP3,CP4,CP5,CP6:
OUTSTD_LOGIC;
Q3,Q4,Q4b,Q5,Q6,Q7,Q8:
BUFFERSTD_LOGIC);
ENDexp5tx;
ARCHITECTUREDISTRIBUTEROFexp5txIS
BEGIN
PROCESS(clk,Q3,Q5)
VARIABLEcount_5:
STD_LOGIC_VECTOR(2DOWNTO0);
VARIABLEcount_2:
STD_LOGIC;
VARIABLEcount_4:
STD_LOGIC_VECTOR(1DOWNTO0);
VARIABLEcount_3:
STD_LOGIC_VECTOR(1DOWNTO0);
BEGIN
IF(clk'EVENTANDclk='1')THEN
IF(count_5="000")THEN
count_5="001";Q3<='1';
ELSIF(count_5="001")THEN
count_5:
="010";Q3<='0';
ELSIF(count_5="010")THEN
count_5:
="011";Q3<='0';
ELSIF(count_5="011")THEN
count_5:
="100";Q3<='0';
ELSIF(count_5="100")THEN
count_5:
="000";Q3<='0';
ENDIF;
ENDIF;
IF(Q3'EVENTANDQ3='1')THEN
IF(count_2='0')THEN
count_2:
='1';Q4<='1';Q4b<='0';
ELSIF(count_2='1')THEN
count_2:
='0';Q4<='0';Q4b<='1';
ENDIF;
ENDIF;
IF(Q3'EVENTANDQ3='1')THEN
IF(count_4="00")THEN
count_4:
="01";Q5<='1';
ELSIF(count_4="01")THEN
count_4:
="10";Q5<='1';
ELSIF(count_4="10")THEN
count_4:
="11";Q5<='0';
ELSIF(count_4="11")THEN
count_4:
="00";Q5<='0';
ENDIF;
ENDIF;
IF(Q5'EVENTANDQ5='1')THEN
IF(count_3="00")THEN
count_3:
="01";Q6<='1';Q7<='0';Q8<='0';
ELSIF(count_3="01")THEN
count_3:
="10";Q6<='0';Q7<='1';Q8<='0';
ELSIF(count_3="10")THEN
count_3:
="00";Q6<='0';Q7<='0';Q8<='1';
ENDIF;
ENDIF;
ENDPROCESS;
CP1<=Q4bANDQ5ANDQ6;
CP2<=Q4bANDNOTQ5ANDQ6;
CP3<=Q4bANDQ5ANDQ7;
CP4<=Q4bANDNOTQ5ANDQ7;
CP5<=Q4bANDQ5ANDQ8;
CP6<=Q4bANDNOTQ5ANDQ8;
ENDDISTRIBUTER;
实验五:
串并转换电路
原理图:
控制逻辑
十六进制计数器
GAL方程:
VHDL代码:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYspIS
PORT(clk,rd:
INSTD_LOGIC;
s7,s6,s5,s4,s3,s2,s1,s0:
OUTSTD_LO