自动化专业毕业设计外文翻译语音控制器Word文档格式.docx
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0.32MHz-49.152MHz
Operatingvoltage:
3.0V-3.6V
ProgramFlashOperatingvoltage:
IOPortA&
Boperatingvoltage:
3.0V-5.5V
32K-wordflashmemory
2K-wordworkingSRAM
Software-basedaudioprocessing
CrystalResonator
Standbymode(ClockStopmode)forpowersavings,
Max.2.0μA@VDD=3.6V
Two16-bittimers/counters
Two10-bitDACoutputs
32generalI/Os(bitprogrammable)
14INTsourceswithtwoprioritylevels
Keywakeupfunction(IOA0-7)
Approx.190secspeech@2.0Kbit/persecwithSACM_S200
PLLfeatureforsystemclock
32768HzRealTimeClock(RTC)
Eightchannels10-bitADconverter
ADCexternaltopreferencevoltage
2.0Vvoltageregulatoroutput,5mAofdrivingcapability
SerialinterfaceI/O(SIO)
Built-inmicrophoneamplifierandAGCfunction
UARTreceiverandtransmitter(fullduplex)
Lowvoltageresetandlowvoltagedetection
Watchdogenable(bondingoption)
ICEfunctionfordevelopmentanddownloadintoflashmemory
Securityfunctiontoprotectcodetobereadandwritten.
4.APPLICATIONFIELD
Voicerecognitionproducts
Intelligentinteractivetalkingtoys
Advancededucationaltoys
Kidslearningproducts
Kidsstorybook
Generalspeechsynthesizer
Longdurationaudioproducts
Recording/playbackproducts
SIGNALDESCRIPTIONS
6.FUNCTIONALDESCRIPTIONS
6.1.CPU
TheSPCE061Aisequippedwitha16-bitμ’nSP™,thenewest16-bitmicroprocessorbySunplusandpronouncedasmicro-n-SP.Eightregistersareinvolvedinμ’nSP™:
R1-R4(General-purposeregisters),PC(ProgramCounter),SP(StackPointer),BasePointer(BP)andSR(SegmentRegister).TheinterruptsincludethreeFIQs(FastInterruptRequest)andeightIRQs(InterruptRequest),plusonesoftware-interrupt,BREAK.
Moreover,ahighperformancehardwaremultiplierwiththecapabilityofFIRfilterisalsobuiltintoreducethesoftwaremultiplicationloading.
6.2.Memory
6.2.1.SRAM
TheamountofSRAMis2K-word(includingStack),rangedfrom$0000through$07FFwithaccessspeedoftwoCPUclockcycles.
6.2.2.Flashmemory
Flashmemory($008000~$00FFFF)isahigh-speedmemorywithaccessspeedoftwoCPUclockcycles.FLASHeraseandprogramfunctionsmustbeusedinIDEtools.
6.3.PLL,Clock,PowerMode
6.3.1.PLL(PhaseLockLoop)
ThepurposeofPLListoprovideabasefrequency(32768Hz)andtopumpthefrequencyfrom20.48MHzto49.152MHzforsystemclock(Fosc).ThedefaultPLLfrequencyis24.576MHz.
6.3.1.1.Systemclock
Basically,thesystemclockisprovidedbyPLLandprogrammedbythePort_SystemClock(W)todeterminethefrequencyofclockforsystem.ThedefaultsystemclockFosc=24.576MHzandCPUclockisFosc/8ifnotspecified.TheinitialCPUclockisFosc/8aftersystemwakesupandtobeadjustedtodesiredCPUclockbyprogrammingthePort_SystemClock(W).ThisavoidsFlashROMreadingfailurewhensystemwakesup.
6.3.1.2.32768HzRTC
TheRealTimeClock(RTC)isnormallyusedinwatch,clockorothertimerelatedproducts.A2Hz-RTC(1/2second)functionisloadedinSPCE061A.TheRTCcountsthetimingaswellastowakeCPUupwheneverRTCoccurs.SincetheRTCisgeneratedeach0.5seconds,timecanbetracedbythenumbersofRTCoccurrence.Inaddition,SPCE061Asupports32768Hzoscillatorinnormalmodeandauto-power-savingmode.Innormalmode,32768HzOSCalwaysrunsatthehighestpowerconsumption.Inauto-power-savingmode,however,itrunsinnormalmodeforthefirst7.5secondsandchangesbacktopower-savingmodeautomaticallytosavepowers.
6.4.StandbyMode
TheSPCE061Aalsooffersastandbymodeforlowpowerapplicationneeds.Toenterstandbymode,thedesiredkeywakeupport(IOA[7:
0])mustbeconfiguredtoinputfirst.AndreadthePort_IOA_Latch(R)tolatchtheIOAstatebeforeenteringthestandbymode.Alsoremembertoenablethecorrespondinginterruptsource(s)forwakeup.Afterthat,stoptheCPUclockbywritingtheSTOPCLOCKRegister(b0~b2ofPort_SystemClock(W))toenterstandbymode.Insuchmode,SRAMandI/OsremaininthepreviousstatestillCPUbeingawoken.ThewakeupsourcesinSPCE061AincludePortIOA7-0andIRQ1-IRQ6.AfterSPCE061Aisawoken,theCPUwillcontinuetoexecutetheprogram.Programmercanalsoenableordisablethe32768HzOSCwhenCPUisinstandbymode.
6.5.LowVoltageDetectionandLowVoltageReset
6.5.1.Lowvoltagedetection(LVD)
TherearetwoLVDlevelstobeselected:
2.9V,and3.3V.TheselevelscanbeprogrammedviaPort_LVD_Ctrl(W).Asanexample,supposeLVDisgivento2.9V.Whenthevoltagedropsbelow2.9V,theb15ofPort_LVD_CtrlisreadasHIGH.Insuchstate,programcanbedesignedtoreacttothiscondition.
6.5.2.Lowvoltagereset
InadditiontotheLVD,theSPCE061Ahasanotherimportantfunction,LowVoltageReset(LVR).WiththeLVRfunction,aresetsignalisgeneratedtoresetsystemwhentheoperatingvoltagedropsbelow2.3Vfor10consecutiveCPUclockcycles.WithoutLVR,theCPUbecomesunstableandmalfunctionswhentheoperatingvoltagedropsbelow2.3V.TheLVRwillresetallfunctionstotheinitialoperational(stable)stateswhenthevoltagedropsbelow2.3V.ALVRtimingdiagramisgivenasfollows:
6.6.Interrupt
TheSPCE061Ahas14interruptsources,groupedintotwotypes,FIQ(FastInterruptRequest)andIRQ(Interruptrequest).ThepriorityofFIQishigherthanIRQ.FIQisthehigh-priorityinterruptwhileIRQisthelow-priorityone.AnIRQcanbeinterruptedbyaFIQ,butnotbyanotherIRQ.AFIQcannotbeinterruptedbyanyotherinterruptsources.
6.7.I/O
TwoI/OportsarebuiltinSPCE061A,PortAandPortB.ThePortAisanordinaryI/Owithprogrammablewakeupcapability.InadditiontotheregularIOfunction,thePortBcanalsoperformsomespecialfunctionsincertainpins.Supposeoperatingvoltageisrunningat3.6V(VDD)andVDDIO(powerforI/O)operatesfrom3.6V(VDD)to5.5V.Insuchcondition,theI/Opadiscapableofoperatingfrom0VthroughVDDIO.HoweverIOB13andIOB14arerecommendedtooperate<
=3.6Vduringstandbymode,otherwisethesetwoIOswillhavecurrentleakage.ThefollowingdiagramisanI/Oschematic.
AlthoughdatacanbewrittenintothesameregisterthroughPort_DataandPort_Buffer,theycanbereadfromdifferentplaces,Buffer(R)andData(R).TheIOA[7:
0]isthekeywakeupport.Toactivatekeywakeupfunction,latchdataonPORT_IOA_Latchandenablethekeywakeupfunction.WakeupistriggeredwhenthePortAstateisdifferentfromatthetimelatched.InadditiontoanordinaryI/Oport,PortBcarriessomespecialfunctions.AsummaryofPortBspecialfunctionsislistedasfollows:
Refertotheabovetable,theconfigurationofIOB2,IOB3,IOB4,andIOB5involvesfeedbackfunctioninwhichanOSCfrequencycanbeobtainedfromEXT1(EXT2)bysimplyaddingaRCcircuitbetweenIOB2(IOB3)andIOB4(IOB5).
6.8.Timer/Counter
TheSPCE061Aprovidestwo16-bittimers/counters,TimerAandTimerB.TheTimerAiscalledauniversalcounter.TimerBisageneral-purposecounter.TheclocksourceofTimerAcomesfromthecombinationofclocksourceAandclocksourceB.InTimerB,theclocksourceisgivenfromsourceC.Whentimeroverflows,anINTsignalissenttoCPUtogenerateatime-outsignal.
Initially,writeavalueofNintoatimerandselectadesiredclocksource,timerwillstartcountingfromN,N+1,N+2,...throughFFFF.AnINT(TimerA/TimerB)signalisgeneratedatthenextclockafterreaching“FFFF”andtheINTsignalistransmittedtoINTcontrollerforfurtherprocessing.Atthesametime,Nwillbereloadedintotimerandstartalloveragain.TheclocksourceAisahighfrequencysourceandclocksourceBisalowfrequencysource.ThecombinationofclocksourceAandBprovidesavarietyofspeedstoTimerA.A“1”representspasssignalandnotgating.Incontrast,“0”indicatesdeactivatingtimer.TheEXT1andEXT2aretheexternalclocksources.Moreover,countercangeneratetime-outsignalforinputclocksourcetoafourbits(16levels)PWMpulsewidthcounter.AvarietyofclockdurationcanbegeneratedandexportedfromIOB8(APWMO)andIOB9(BPWMO).
Thefollowingexampleisa3/16-durationcycle.TheAPWMOwaveformismadebyselectingapulsewidththroughPort_TimerA_Ctrl(W)[9:
6].Asaresult,each16cycleswillgenerateapulsewidthdefinedincontrolport.ThesePWMsignalscanbeappliedforcontrollingthespeedofmotororotherdevices.
Generallyspeaking,theclocksourceAandCarefastclocksourcesandsourceBcomesfromRTCsystem(32768Hz).Therefore,clocksourceBcanbeutilizedasaprecisecounterfortimecounting,e.g.,the2Hzclockcanbeusedforrealtimecounting.
6.8.1.