8052外文翻译Word文档下载推荐.docx

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系别

信息工程系

专业

测控技术与仪器

班级

B141402

学号

B14140212

姓名

韩智

指导教师

许谨

负责教师

沈阳航空航天大学北方科技学院

2015年5月

89S52seriesmicrocontroller

The89S52familyofmicrocontrollersisbasedonanarchitecturewhichishighlyoptimizedforembeddedcontrolsystems.ItisusedinawidevarietyofapplicationsfrommilitaryequipmenttoautomobilestothekeyboardonyourPC.SecondonlytotheMotorola68HC11ineightbitprocessorssales,the89S52familyofmicrocontrollersisavailableinawidearrayofvariationsfrommanufacturerssuchasIntel,Philips,andSiemens.Thesemanufacturershaveaddednumerousfeaturesandperipheralstothe89S52suchasI2Cinterfaces,analogtodigitalconverters,watchdogtimers,andpulsewidthmodulatedoutputs.Variationsofthe89S52withclockspeedsupto40MHzandvoltagerequirementsdownto1.5voltsareavailable.Thiswiderangeofpartsbasedononecoremakesthe89S52familyanexcellentchoiceasthebasearchitectureforacompany'

sentirelineofproductssinceitcanperformmanyfunctionsanddeveloperswillonlyhavetolearnthisoneplatform.

Thebasicarchitectureconsistsofthefollowingfeatures:

1.aneightbitALU

2.32descreteI/Opins（4groupsof8）whichcanbeindividuallyaccessed

3.two16bittimer/counters

4.fullduplexUART

5.6interruptsourceswith2prioritylevels

6.128bytesofonboardRAM

7.separate64KbyteaddressspacesforDATAandCODEmemory

One89S52processorcycleconsistsoftwelveoscillatorperiods.Eachofthetwelveoscillatorperiodsisusedforaspecialfunctionbythe89S52coresuchasopcodefetchesandsamplesoftheinterruptdaisychainforpendinginterrupts.Thetimerequiredforany89S52instructioncanbecomputedbydividingtheclockfrequencyby12,invertingthatresultandmultiplyingitbythenumberofprocessorcyclesrequiredbytheinstructioninquestion.Therefore,ifyouhaveasystemwhichisusingan11.059MHzclock,youcancomputethenumberofinstructionspersecondbydividingthisvalueby12.Thisgivesaninstructionfrequencyof921583instructionspersecond.Invertingthiswillprovidetheamountoftimetakenbyeachinstructioncycle（1.085microseconds）.

1.MemoryOrganization

The89S52architectureprovidestheuserwiththreephysicallydistinctmemoryspaceswhichcanbeseeninFigureA-1.Eachmemoryspaceconsistsofcontiguousaddressesfrom0tothemaximumsize,inbytes,ofthememoryspace.Addressoverlapsareresolvedbyutilizinginstructionswhichreferspecificallytoagivenaddressspace.Thethreememoryspacesfunctionasdescribedbelow.

2.TheCODESpace

ThefirstmemoryspaceistheCODEsegmentinwhichtheexecutableprogramresides.Thissegmentcanbeupto64K（sinceitisaddressedby16addresslines）.TheprocessortreatsthissegmentasreadonlyandwillgeneratesignalsappropriatetoaccessamemorydevicesuchasanEPROM.However,thisdoesnotmeanthattheCODEsegmentmustbeimplementedusinganEPROM.ManyembeddedsystemsthesedaysareusingEEPROMwhichallowsthememorytobeoverwritteneitherbythe89S52itselforbyanexternaldevice.ThismakesupgradestotheproducteasytodosincenewsoftwarecanbedownloadedintotheEEPROMratherthanhavingtodisassembleitandinstallanewEPROM.Additionally,batterybackedSRAMcanbeusedinplaceofanEPROM.ThismethodoffersthesamecapabilitytouploadnewsoftwaretotheunitasdoesanEEPROM,anddoesnothaveanysortofread/writecyclelimitationssuchasanEEPROMhas.However,whenthebatterysupplyingtheRAMeventuallydies,sodoesthesoftwareinit.UsinganSRAMinplaceofanEPROMindevelopmentsystemsallowsforrapiddownloadingofnewcodeintothetargetsystem.Whenthiscanbedone,ithelpsavoidthecycleofprogramming/testing/erasingwithEPROM,andcanalsohelpavoidhasslesoveranincircuitemulatorwhichisusuallyararecommodity.

Inadditiontoexecutablecode,itiscommonpracticewiththe89S52tostorefixedlookuptablesintheCODEsegment.Tofacilitatethis,the89S52providesinstructionswhichallowrapidaccesstotablesviathedatapointer（DPTR）ortheprogramcounterwithanoffsetintothetableoptionallyprovidedbytheaccumulator.Thismeansthatoftentimes,atable'

sbaseaddresscanbeloadedinDPTRandtheelementofthetabletoaccesscanbeheldintheaccumulator.Theadditionisperformedbythe89S52duringtheexecutionoftheinstructionwhichcansavemanycyclesdependingonthesituation.Anexampleofthisisshownlaterinthischapterin.

3.TheDATASpace

Thesecondmemoryspaceisthe128bytesofinternalRAMonthe89S52,orthefirst128bytesofinternalRAMonthe89S52.ThissegmentistypicallyreferredtoastheDATAsegment.TheRAMlocationsinthissegmentareaccessedinoneortwocyclesdependingontheinstruction.Thisaccesstimei