电子时钟.ppt
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LED数码显示时钟实验,LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_SIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYTIMERISPORT（CLK5:
INSTD_LOGIC;CLK3:
INSTD_LOGIC;RST1:
INSTD_LOGIC;SEG_SEL:
OUTSTD_LOGIC_VECTOR（2DOWNTO0）;SEG_DA:
OUTSTD_LOGIC_VECTOR（7DOWNTO0）;ENDTIMER;,ARCHITECTUREADOOFTIMERISCOMPONENTCNT10PORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCOMPONENT;COMPONENTCNT6PORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCOMPONENT;COMPONENTCNT2PORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
INOUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCOMPONENT;,COMPONENTCNT4PORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCOMPONENT;SIGNALS_BUF1,S_BUF2,S_BUF3,S_BUF4:
STD_LOGIC_VECTOR（3DOWNTO0）;SIGNALS_BUF5,S_BUF6,S_BUF7,S_BUF8:
STD_LOGIC_VECTOR（3DOWNTO0）;SIGNALS_CNT:
STD_LOGIC_VECTOR（2DOWNTO0）;SIGNALS_TEMP:
STD_LOGIC_VECTOR（3DOWNTO0）;SIGNALCOUT:
STD_LOGIC_VECTOR（5DOWNTO0）;SIGNALCLK:
STD_LOGIC;BEGIN,PROCESS（CLK3）BEGINIFCLK3EVENTANDCLK3=1THENCLK=NOTCLK;ENDIF;ENDPROCESS;PROCESS（CLK,RST1）BEGINIFCLKEVENTANDCLK=1THENIFRST1=1THENS_CNT=000;ELSES_CNT=S_CNT+1;ENDIF;ENDIF;ENDPROCESS;S_SEL=S_CNT;S_BUF3=1111;S_BUF6=1111;,PROCESS（S_CNT,S_BUF1,S_BUF2,S_BUF3,S_BUF4,S_BUF5,S_BUF6,S_BUF7,S_BUF8）BEGINCASES_CNTISWHEN000=S_TEMPS_TEMPS_TEMPS_TEMPS_TEMPS_TEMPS_TEMPS_TEMPNULL;ENDCASE;ENDPROCESS;,PROCESS（SEG_TEMP）BEGINCASESEG_TEMPISWHEN0000=SEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DASEG_DA=x00;ENDCASE;ENDPROCESS;,U1:
CNT10PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF1,COUT=COUT（0）,CIN=1）;U2:
CNT6PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF2,COUT=COUT
（1）,CIN=COUT（0）;U3:
CNT10PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF4,COUT=COUT
（2）,CIN=COUT
（1）;U4:
CNT6PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF5,COUT=COUT（3）,CIN=COUT
（2）;U5:
CNT4PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF7,COUT=COUT（4）,CIN=COUT（3）;U6:
CNT2PORTMAP（CLK=CLK5,RST=RST1,CNT_VAL=S_BUF8,COUT=COUT（5）,CIN=COUT（4）;ENDADO;,LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_SIGNED.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYCNT10ISPORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCNT10;ARCHITECTUREBEHAVEOFCNT10ISSIGNALCNT_T:
STD_LOGIC_VECTOR（3DOWNTO0）;BEGINPROCESS（CLK）BEGINIFRST=1THENCNT_T=0000;,ELSIFCLKEVENTANDCLK=1THENIFCIN=1THENIFCNT_T/=9THENCNT_T=CNT_T+1;ELSECNT_T=0000;ENDIF;ENDIF;ELSECNT_T=CNT_T;ENDIF;ENDPROCESS;COUT=1WHENCNT_T=9ANDCIN=1ELSE0;CNT_VAL=CNT_T;ENDBEHAVE;,LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_SIGNED.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYcnt6ISPORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCNT6;ARCHITECTUREADO2OFCNT6ISSIGNALCNT_T:
STD_LOGIC_VECTOR（3DOWNTO0）;SIGNALCOUTD:
STD_LOGIC;BEGINPROCESS（CLK,RST）BEGINIFRST=1THENCNT_T=0000;,ELSIFCLKEVENTANDCLK=1THENIFCIN=1THENIFCNT_T5THENCNT_T=CNT_T+1;ELSECNT_T=x0;ENDIF;ENDIF;ELSECNT_T=CNT_T;ENDIF;ENDPROCESS;COUT=1WHENCNT_T=5ANDCIN=1ELSE0;CNT_VAL=CNT_T;ENDADO2;,LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_SIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYCNT2ISPORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCNT2;ARCHITECTUREADO3OFCNT2ISSIGNALCNT_T:
STD_LOGIC_VECTOR（3DOWNTO0）;BEGINPROCESS（CLK,RST）BEGINIFRST=1THENCNT_T=0000;,ELSIFCLKEVENTANDCLK=1THENIFCIN=1THENIFCNT_T1THENCNT_T=CNT_T+1;ELSECNT_T=0000;ENDIF;ENDIF;ELSECNT_T=CNT_T;ENDIF;ENDPROCESS;COUT=1WHENCNT_T=1ANDCIN=1ELSE0;CNT_VAL=CNT_T;ENDADO3;,LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_SIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYCNT4ISPORT（CLK:
INSTD_LOGIC;RST:
INSTD_LOGIC;CIN:
INSTD_LOGIC;CNT_VAL:
OUTSTD_LOGIC_VECTOR（3DOWNTO0）;COUT:
OUTSTD_LOGIC）;ENDCNT4;ARCHITECTUREBEHAVEOFCNT4ISSIGNALCNT_T:
STD_LOGIC_VECTOR（3DOWNTO0）;BEGINPROCESS（CLK,RST）BEGINIFRST=1THENCNT_T=0000;,ELSIFCLKEVENTANDCLK=1THENIFCIN=1THENIFCNT_T3THENCNT_T=CNT_T+1;ELSECNT_T=0000;ENDIF;ENDIF;ELSECNT_T=CNT_T;ENDIF;ENDPROCESS;CNT_VAL=CNT_T;COUT=1WHENCNT_T=3ANDCIN=1ELSE0;ENDBEHAVE;,
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